AMD will publicly demonstrate its Epyc Venice server CPUs based on the upcoming Zen 6 architecture this month at the Advancing AI 2026 summit. The event is scheduled for July 22 and 23 in San Francisco and will provide a platform for various technology companies, including AMD, to showcase their developments.
The Zen 6 architecture has been long anticipated by AMD. The Epyc Venice CPUs will represent the most powerful application of this next-generation technology and will also form the foundation for the next-generation Ryzen consumer CPUs. This demonstration will offer insights into the architecture’s performance metrics, such as efficiency, instructions-per-clock improvement, and potential frequency capabilities.
AMD claims that the Epyc Venice platform can achieve up to 1.7 times the performance of the previous generation Epyc CPUs. The core count for Venice will increase to 256 from 192, providing a significant performance boost. These CPUs are being manufactured using TSMC’s new 2nm process technology, which is expected to enhance both efficiency and performance.
The Epyc Venice CPUs will utilize the new SP7 socket and support 16-channel memory, enabling data transfer rates of up to 1.6TB/s. Additionally, they will support PCIe 6 for improved CPU-to-GPU communications. The chips are designed for installation in AMD Helios racks alongside MI455 Instinct GPUs.
While the Epyc Venice CPUs are set for release, consumer versions of the Zen 6 architecture are not expected until next year. Initially anticipated for a 2026 debut, delays due to memory shortages have pushed the expected release to CES 2027 at the earliest. AMD did not reference the consumer chips during its Computex presentation, reinforcing this timeline.
As the Advancing AI 2026 summit approaches, anticipation builds for the Epyc Venice demonstration, which will provide the first look at AMD’s latest advancements in CPU technology.
